1. Field of the Invention
This invention is in the field of digital data processing systems and more particularly relates to a circuit for implementing an instruction for moving a binary number stored in a word addressable memory in a form which may be incompatible with the binary number being used in computations and for storing the binary number in an addressable register in a form compatible with its being used or operated on as a pure binary number.
2. Description of the Prior Art
Digital data processing systems are optimized to handle groups of a given number of bits, sometimes hereinafter referred to as data bits, in parallel, or as an entity, with a group of data bits being defined as a word, or a machine word. A word in turn can be defined as including a plurality of bytes with each byte containing a given number of data bits. There is no agreed to standard for the number of data bits to a byte. Some computer equipment manufacturers have standardized their equipment to use an 8 data bit byte and others to use a 9 data bit byte. In this application the word byte when used without a prefix or modifier will mean a 9 data bit byte.
Some data processing systems organize their memories, or working store, on the basis that each addressable memory location stores a machine word. Others are organized so that each addressable memory location will store a byte most commonly an 8 bit byte. Either type of computing system when required to operate on, or process, binary numbers will generally restrict or limit a binary number to a given number of characters where a character in an 8 bit byte machine will be 8 bits, an octet, and in a 9 bit byte machine will be 9 bits, a nonet. A word oriented data processing system having a word addressable memory with a word length of 36 bits is divisible into 4 bytes. To increase the ability of such a word oriented computer to compete with 8 bit byte oriented computers, it is desirable that such a word oriented computer be able to run application programs written to run on an 8 bit type character addressable memory computer. Such a word oriented computer should be able to handle binary numbers of one to four characters either octets or nonets. An advantage derived by a computer having this capability is that it saves users replacing a byte oriented computer with such a word oriented computer from having to rewrite their application programs. Such a conversion can be expensive and time consuming. However, to provide a word oriented computer with the capability of handling binary numbers having characters of either 8 or 9 bits per character requires that the computer have the ability to store a binary number in a word organized memory location with the most significant character of the binary number, the one that contains the most significant bit of the binary number, in any of the four byte positions of a given word location in memory with the remaining characters of the binary number being stored in adjacent byte positions in decreasing order of significance. Where 8 bit characters are stored in a 9 bit byte position, the most significant bit position of each byte will have a fill bit, normally a zero, stored in it. Depending upon the number of characters in a binary number and the byte location in which the most significant character is stored the less significant characters of the binary number may be stored in a contiguous word location in memory, or across a word boundary.
Given a binary number of from one to four characters with each character of a given number having either 8 or 9 bits per character and with the characters being stored in a word addressable memory with the most significant character in any one of the byte positions of the given memory location, the problem is how to efficiently move the binary number from its addressable memory location or locations to an addressable register in the central processor of the system with the binary number positioned in the register so that it is ready to be processed, or operated on; i.e., added, subtracted, multiplied, divided, etc. with the bits of the number right justified with the least significant bit of the number in the least significant bit position of the register and the more significant bits of the binary number stored in ascending order of significance from right to left. In addition with respect to some binary numbers it is also necessary to fill the higher order bit positions of the register not having stored into them a bit of the binary number either a fill bit or the sign bit of the number where the sign bit is the bit in the most significant bit position of the binary number. Heretofore, the manner in which this particular function has been performed has been by a software program. Such a program requires a significant number of instructions, each of which will require several clock periods to perform so that a significant amount of time is required to fetch from memory the binary number and position it in a designated register ready for subsequent processing. The penalty in performance, measured in terms of throughput of a data processing system which must make such transformations, obviously adversely affects the ability of such a data processing system to compete effectively particularly in performing such programs compared to a data processing system organized to directly address the characters of the binary number.